Parker Mitchell

Computer Engineer

Senior, University of Tennessee



Interests

  • Embedded Systems Microcontrollers, RTOS, FPGAs
  • Autonomous Robotics Small-scale autonomous robots using off the shelf components
  • Computer Architecture Processor Design, Interconnects
  • Neuromorphic Computing Artificial Neural Networks, Biologically Inspired Computing
  • High Performance Computing Algorithm Optimziation, SIMD (SSE/AVX), GPGPU, Multithreading, Clusters
  • Audio Engineering Signal processing, amplifier design, digital to analog conversion

Research

  • DANNA - Dynamic Adaptive Neural Network Arrays Team Website
    Member of UTK's Neuromorphic Computing Team - specifically working with the FPGA implementation of DANNA. Current tasks include overhauling internal random address selection and implementing and updating op codes.

Tutorials

  • Raspberry Pi 2 IEEE Workshop Link to writeup
    Basic introduction to the Raspberry Pi 2 system.
  • more to come...

Current Projects

  • General Robotics Development Platform Developing a generalized rapid prototyping platform for small scale autonomous robots
  • IEEE SouthEastCon 2017 Hardware Competition Building an autonomous robot to complete a Star Wars themed compeititon. Acting as Team Captain for 2016-2017. More details forthcoming...
  • ARM Supercomputing Cluster Graduate level course on Supercomputer Design & Analysis - includes the construction of a 64 node Raspberry Pi 3 cluster with the possibility of adding nVidia TX1 compute nodes and/or pine64 compute nodes
  • Multi-stage Headphone Audio Amplifier Hobbyist design of an op amp based multi-stage headphone amplifier - includes schematic design, part selection, PCB design, and final assembly
  • RISC ISA & CPU Design An educational activity to design a RISC ISA along with a CPU core design - includes determining specifications, VHDL core design, FPGA core implementation, and assmebler implementation

Completed Projects

  • Multiplayer Checkers on an FPGA VHDL implementation of multiplayer Checkers on a Xilinx Artix 7 FPGA - including game logic, VGA output, joystick support, and move highlighting.
  • Disk based B+ Tree Implementation Built a B+ Tree data structure in C interfacing with an emulated hard drive system. Managed tree structure in an optimal manner with direct sector reads and writes.
  • IEEE SouthEastCon 2016 Hardware Competition Built an autonomous robot to complete a logistics themed task. The robot was required to identify and sort wooden blocks of different sizes and colors.
  • IEEE SouthEastCon 2015 Hardware Competition Built an autonomous robot to complete a series a mini games including playing Simon, drawing IEEE on an Etch-a-Sketch, picking up a playing card, and rotating a Rubik's Cube.
  • ProjClock — Multi-user Project Time Tracking Software Built as a responsive web application with a PHP 5 and SQLite backend. ProjClock allows for shared and private project time tracking. It offers both CSV and XLSX (Excel) export options.