Parker Mitchell

Computer Engineer



I am currently a graduate student in Computer Engineering at the University of Tennessee working under Dr. Mark Dean in the Tenn Lab neuromorphic research group.


Interests

  • Computer Architecture Processor Design, Interconnects, Memristive Crossbars
  • Neuromorphic Computing Brain Inspired Architectures, Neural Networks
  • Embedded Systems Microcontrollers, RTOS, FPGAs, Sensors
  • Autonomous Robotics Small-scale autonomous robots using off the shelf components
  • Parallel Computing OpenMP, MPI, CUDA, pthreads, Cluster Design
  • Audio Engineering Signal processing, amplifier design, digital to analog conversion

Research

  • DANNA - Dynamic Adaptive Neural Network Arrays Team Website
    Member of UTK's Neuromorphic Computing Team - specifically working with the FPGA implementation of DANNA. Current tasks include overhauling internal random address selection, improving USB communication, and implementing new op codes and features.
  • ARM Supercomputing Working with commodity ARM hardware to develop strategies for High Performance Computing. Examining the benefit of heterogeneous architectures including both varying CPU and GPU architectures working together in a cohesive environment.

Publications

Tutorials

  • Raspberry Pi 2 IEEE Workshop Link to writeup
    Basic introduction to the Raspberry Pi 2 system.
  • more to come...

Current Projects

  • General Robotics Development Platform Project Website
    Developing a generalized rapid prototyping platform for small scale autonomous robots. The system will be open source and documented. We are currently in the early development phases.
  • IEEE SouthEastCon 2018 Hardware Competition Robotics Github
    Serving as Team Captain for 2017-2018.

Completed Projects

  • NeoN - A Neuromorphic Navigation System More Info
    Serving as team lead for a Senior Design project to develop a collision avoidance system for an autonomous robot using a Neuromorphic architecture (FPGA implementation of DANNA as the Neuromorphic system).
  • IEEE SouthEastCon 2017 Hardware Competition Robotics Github
    Built an autonomous robot to complete a Star Wars themed compeititon. Serving as Team Captain for 2016-2017.
  • Heterogeneous ARM Supercomputing Cluster More Info
    Graduate Supercomputing Course — Building a cluster from 32 Pine64 and 12 nVidia TX1 nodes to form a high performance 64-bit ARMv8 and CUDA heterogeneous cluster. I am focusing on the systems architecture, CUDA integration, and performance evaluation and optimization.
  • ARM Supercomputing Cluster More Info
    Graduate Supercomputing Course — Project based — Building a cluster from 64+ Raspberry Pi 3 boards. I primarly focus on the System and Networking details in addition to optimizing BLAS and HPL for the system.
  • IEEE SouthEastCon 2016 Hardware Competition Github Repo Link
    Built an autonomous robot to complete a logistics themed task. The robot was required to identify and sort wooden blocks of different sizes and colors.
  • Multiplayer Checkers on an FPGA VHDL implementation of multiplayer Checkers on a Xilinx Artix 7 FPGA - including game logic, 4bpc VGA output, joystick support, and move highlighting.
  • Disk based B+ Tree Implementation Code available on request
    Built a B Tree data structure in C interfacing with an emulated hard drive system. Managed tree structure in an optimal manner with direct sector reads and writes.
  • IEEE SouthEastCon 2015 Hardware Competition Built an autonomous robot to complete a series of mini games including playing Simon, drawing IEEE on an Etch-a-Sketch, picking up a playing card, and rotating a Rubik's Cube.
  • ProjClock — Multi-user Project Time Tracking Software Built as a responsive web application with a PHP 5 and SQLite backend. ProjClock allows for shared and private project time tracking. It offers both CSV and XLSX (Excel) export options. Completed prior to arriving at UT.